Three-dimensional packaging technology that stacks plural semiconductor chips in a semiconductor chip thickness direction is known as a form of technology that is breaking the boundaries for miniaturization in Large Scale Integration (LSI). In three-dimensional packaging technology, packaging technology is being researched in which Through Silicon Vias (hereafter referred to as TSVs) are used to form an electrical connection between the stacked semiconductor chips. Implementing three-dimensional packaging using TSVs enables connection with the shortest distance between the stacked chips, thereby enabling high speed operation and reduced power consumption.
In a manufacturing process of a device including TSVs, treatment to expose the TSVs that are embedded in silicon at a chip back face side is performed by thinning a device wafer by grinding from a back face side. Moreover, thinning of the device wafer is also important from the viewpoint of reducing the thickness of a package to which three-dimensional packaging technology is applied. Device wafers are sometimes ground down to a thickness in the region of several tens of μm, and in such cases, the device wafer is unable to be self-supporting, making handling difficult in each process after thinning. As a result, technology known as temporary bonding is employed in which a support substrate is stuck to the device wafer in order to temporarily support the device wafer.
Technology such as that listed below has been proposed regarding semiconductor device manufacturing processes including device wafer grinding treatment. For example, technology has been proposed in which a step is formed at a peripheral edge portion of a front face side of a device wafer, and a support substrate is stuck to the front face of the device wafer using an adhesive, after which the device wafer is ground from a back face side until the step disappears.
Moreover, technology has been proposed in which protective tape adheres to a beveled portion on a front face side of a device wafer when the device wafer that has the protective tape stuck to the front face side is mounted on a processing stage and a back face side of the device wafer is ground.